Parnian Shabani Kamran

Publications

Vision Paper: Proof-Carrying Code Completions
Parnian Kamran, Premkumar Devanbu, and Caleb Stanford
ASYDE workshop co-located with ASE, 2024

On the Performance of Malware Detection Classifiers Using Hardware Performance Counters
Alireza Abolhasani Zeraatkar, Parnian Shabani Kamran, Inderpreet Kaur, Nagabindu Ramu, Tyler Sheaves, Hussain Al-Asaad
International Conference on Smart Applications, Communications and Networking (SmartNets), 2024

Advancements in Secure Computing: Exploring Automated Repair Debugging and Verification Techniques for Hardware Design
Alireza Abolhasani Zeraatkar, Parnian Shabani Kamran, Hussain Al-Asaad
IEEE 14th Annual Computing and Communication Workshop and Conference (CCWC), 2024

Projects

Fall 2025 - Final Project of ECS 289, Special Topics in LLMs Developed a comprehensive framework and new benchmark to measure LLM faithfulness under perturbed Chain-of-Thought reasoning, injecting controlled early- and mid-step errors into 101 DeltaBench problems and evaluating GPT-4-1-mini, GPT-4o-mini, Qwen2.5-72B, and Llama-3.1-70B using behavioral metrics that reveal how models balance obedience to incorrect reasoning versus correction driven by internal knowledge
Winter 2025 - Final Project of ECS 245, Analysis of Software Artifacts Engineered end-to-end classification pipelines by incorporating Random Forest, Logistic Regression, and SMOTE for class imbalance to predict build reproducibility across 3,722 Bugswarm artifacts, achieving 93% precision and recall of 94% for reproducible builds

Fall 2024 - Final Project of ECS 235A, Computer and Information Security Improvement of OSSGadget typosquatting detection in cases where the package has a prefix/suffix added to or removed from its name by 38.6% by applying and adapting rules from Typomind, resulting in a reduction of the total amount of false positives. Source code, results and project are accessible using this link

End-to-end classification pipelines for malware detection Incorporating 18 binary classifiers and two ensemble machine learning methods to spot malicious application patterns by applying effective EDA technique to reduce the features dimentionality up to 50% without sacrificing the performance, published in the Smart Applications, Communications and Networking Conference, April 2024

Fall 2021 - Optimized a multicore 2D screensaver using OpenCilk Optimized a multicore 2D screensaver by parallelizing a quadtree-based collision detection algorithm using OpenCilk, achieving 1.5 average speedup on 8-core AWS machines through recursive task parallelism, and performance benchmarking across 1, 000– 5, 000 frames while maintaining correctness in collision results to outperform the Θ(N²) pairwise checks

Academic Services

Session chair of release engineering and fuzzing 1 at ASE 2024

Work Experience

June 2025 - September 2025: R&D Intern @ Endor Labs, Palo Alto, California — Engineering Team
November 2017 - December 2020: Software Engineer @ Snapptrip — Fulfillment team
August 2016 - October 2017: Engineer @ Huawei — LTE network optimization team

Teaching Experience

Fall 2025: MAT 21B Calculus —
- Leaded weekly discussions and individually designed presentations for discussions based on assignments and guide individualized problem-solving, grading exams and assignments
Spring 2024: ECS 189C Software Correctness — A sophomore-level course in Dafny, Z3 and Hypothesis, and Rust
- Coordinated with the professor to structure a course for 60+ students
- Individually organized weekly office hours
- Engaged in discourse with students, involving answering questions, and aided in setting up the coding tools and required libraries for coding assignments
Winter 2023: EEC 180 Digital Systems II — A sophomore-level course in Verilog
- Individually organized weekly lab sessions for 20+ students
- Aided students in setting up the code development and simulation tools, running test cases, diagnosing errors and resolving it
Fall 2022: EEC 193A Senior Design Project — A sophomore-level course in Internet of Things
- Coordinated with the professor to structure a course for 19 students, grading papers and and aiding in homework preparation
- Individually organized weekly lab sessions and designed 2 lab assignments
- Aided students in setting up the code development and simulation tools, and circuit design
Fall 2016: Computer Architecture — A sophomore-level course in VHDL Individually organized weekly 4 hours lab sessions for 20+ students
Spring 2013: Digital System Design II — A sophomore-level course in Verilog.
Fall 2011: Digital System Design — A sophomore-level course in Verilog.

Volunteer Experience

Student volunteer at ASE 2024